VI-HPS Tuning Workshop (LRZ, Garching, Germany)
Monday 23rd - Friday 27th April 2018.
The workshop will take place in Kursraum 2 (H.U.010) at LRZ, Leibniz Supercomputing Centre on the university campus Garching-bei-München, Germany.
- give an overview of the VI-HPS programming tools suite
- explain the functionality of individual tools, and how to use them effectively
- offer hands-on experience and expert assistance using the tools
Presentations and hands-on sessions are planned on the following topics:
- Setting up, welcome and introduction
- Score-P instrumentation and measurement
- Scalasca automated trace analysis
- TAU performance system
- Vampir interactive trace analysis
- Periscope/PTF automated performance analysis and optimisation
- Extra-P automated performance modeling
- Paraver/Extrae/Dimemas trace analysis and performance prediction
- [k]cachegrind cache utilisation analysis
- MAQAO performance analysis & optimisation
- MUST runtime error detection for MPI
- ARCHER runtime error detection for OpenMP
JUBE script-based workflow execution environment
- ... and potentially others to be added
A brief overview of the capabilities of these and associated tools is provided in the VI-HPS Tools Guide.
The workshop will be held in English and run from 09:00 to not later than 18:00 each day, with breaks for lunch and refreshments. For participants from public research institutions in PRACE countries, the course fee is sponsored through the PRACE PATC program. All participants are responsible for their own travel and accommodation.
A social event for participant and instructor networking is planned for the evening on Tuesday 24 April, consisting of a guided tour of the Weihenstephan Brewery followed by a self-paid dinner at the brewery restaurant.
Classroom capacity is limited, therefore priority may be given to applicants with parallel codes already running on the workshop computer system (CooLMUC3), and those bringing codes from similar Xeon Phi x86 cluster systems to work on. Participants are therefore encouraged to prepare their own MPI, OpenMP and hybrid MPI+OpenMP parallel application codes for analysis.
Hardware and Software Platforms
CooLMUC3: KNL-based x86 Linux cluster system:
- 148 compute nodes each with single Intel Xeon Phi 7210-F 'Knights Landing' MIC processors (1.3GHz, 64 cores per processor, 4 hardware threads per core) and 96GB RAM and 16GB HBM
- cluster modes: quad, snc4, a2a
- memory modes: flat, cache, hybrid
- network: Intel OmniPath interconnect
- parallel filesystem: GPFS (SCRATCH & WORK)
- software: SLES12-based GNU/Linux, Intel MPI; Intel, GCC and other compilers; SLURM batchsystem
The local HPC system CooLMUC3 is the primary platform for the workshop and will be used for the hands-on exercises. Course accounts will be provided during the workshop to participants without existing accounts. Other systems where up-to-date versions of the tools are installed can also be used when preferred, though support may be limited and participants are expected to already possess user accounts on non-local systems. Regardless of whichever systems they intend to use, participants should be familiar with the relevant procedures for compiling and running their parallel applications (via batch queues where appropriate).
Register via the PRACE training portal: the number of participants is limited.
The workshop will be held in Leibniz Rechenzentrum on the university campus outside Garching bei München, approximately 25 min north from the city centre of Munich. The U-bahn line U6 (station: Garching-Forschungszentrum) provides direct connection from the campus area to both Munich and Garching.
Getting to/from LRZ
Tuning Workshop SeriesBrian Wylie
Jülich Supercomputing Centre
Forschungszentrum Jülich GmbH
Phone: +49 2461 61-6589
Leibniz Supercomputing Centre
Phone: +49 89 35831 8863
|This workshop is a PRACE Advanced Training Centre (PATC) course, organised by LRZ & JSC for the Gauss Centre for Supercomputing.|