Virtual Institute – High Productivity Supercomputing

26th VI-HPS Tuning Workshop (Lab. ECR, TER@TEC, France)

Date

Monday 16th - Friday 20th October 2017

Location

The workshop will take place at Laboratoire Exascale Computing Research (ECR), Campus Ter@tec, Bruyères‐le‐Châtel, 91297 Arpajon, France.

Organizing Institutions

UVSQ Lab. ECR CEA

Goals

This workshop organized by VI-HPS and UVSQ will:

  • give an overview of the VI-HPS programming tools suite
  • explain the functionality of individual tools, and how to use them effectively
  • offer hands-on experience and expert assistance using the tools

Programme Overview

Presentations and hands-on sessions are planned on the following topics:

  • Setting up, welcome and introduction
  • MAQAO performance analysis & optimisation
  • Score-P instrumentation and measurement
  • Scalasca automated trace analysis
  • Vampir interactive trace analysis
  • Extra-P automated performance modeling
  • PTF automated tuning framework
  • Paraver/Extrae/Dimemas trace analysis and performance prediction
  • TAU performance system
  • MUST runtime error detection for MPI
  • ARCHER runtime error detection for OpenMP
  • ... and additional tools from CEA and Intel.

A brief overview of the capabilities of these and associated tools is provided in the VI-HPS Tools Guide.

The workshop will be held in English and run from 09:00 to not later than 18:00 each day, with breaks for lunch and refreshments. There is no fee for participation. All participants are responsible for their own travel and accommodation, for which recommendations are provided by Campus Ter@tec.

Classroom capacity is limited. Prospective participants are therefore encouraged to prepare their own MPI, OpenMP and hybrid MPI+OpenMP parallel application codes for analysis.

Participants are expected to use their own notebook computers to connect to the workshop computer systems via SSH: X11 will also be required for the graphical tools.

TW26@Teratec classroom TW26@Teratec attendees

Programme in Detail

Day 1: Monday 16 October
09:00 Welcome
  • Introduction to VI-HPS & overview of tools [Andres Charif-Rubial, PeXL]
  • Introduction to parallel performance engineering [Micha Knobloch, JSC]
  • Lab setup
  • Computer systems and software environment [Emmanuel Oseret, UVSQ] (INTI quick reference)
  • Building and running NPB-MZ-MPI on INTI [Michael Knobloch, JSC]
  • 10:30 (break)
    11:00 MAQAO performance analysis tools [Emmanuel Oseret, UVSQ & Andres Charif-Rubial, PeXL]
  • MAQAO hands-on exercises (MAQAO quick reference)
  • 12:30 (lunch)
    14:00 Hands-on coaching to apply tools to analyze participants' own code(s).
    17:30 Review of day and schedule for remainder of workshop
    18:00 (adjourn)

    Day 2: Tuesday 17 October
    09:00 Score-P instrumentation & measurement toolset [JSC/TUDresden]
  • Score-P hands-on exercises
  • CUBE profile explorer hands-on exercises [Michael Knobloch, JSC]
  • Score-P analysis scoring & measurement filtering  [JSC/TUDresden]
  • Measuring hardware counters and other metrics 
  • 10:30 (break)
    11:00 Scalasca automated trace analysis [Michael Knobloch, JSC]
  • Scalasca hands-on exercises
  • Vampir interactive trace analysis [Johannes Ziegenbalg, TUDresden]
  • Vampir hands-on exercises
  • 12:30 (lunch)
    14:00 Hands-on coaching to apply tools to analyze participants' own code(s).
    17:30 Review of day and schedule for remainder of workshop
    18:00 (adjourn)

    Day 3: Wednesday 18 October
    09:00 Intel performance tools [David Liu, Intel]
  • Intel hands-on exercises
  • 10:30 (break)
    11:00 Extra-P performance modeling [Daniel Lorenz, TUDarmstadt]
  • Extra-P hands-on exercises
  • PTF autotuning [Robert Mijakovic, TUM]
  • PTF hands-on exercises
  • 12:30 (lunch)
    14:00 Hands-on coaching to apply tools to analyze participants' own code(s).
    17:30 Review of day and schedule for remainder of workshop
    18:00 (adjourn)

    Day 4: Thursday 19 October
    09:00 Paraver tracing tools suite [Judit Gimenez & German Llort, BSC]
  • Paraver hands-on exercises
  • 10:30 (break)
    11:00 TAU performance system [Sameer Shende, UOregon]
  • TAU hands-on exercises
  • 12:30 (lunch)
    14:00 Hands-on coaching to apply tools to analyze participants' own code(s).
    17:30 Review of day and schedule for remainder of workshop
    18:00 (adjourn)

    Day 5: Friday 20 October
    09:00 MUST MPI runtime error detection [Joachim Protze, RWTH]
  • MUST hands-on exercises
  • ARCHER OpenMP runtime error detection [Joachim Protze, RWTH]
  • ARCHER hands-on exercises
  • 10:30 (break)
    11:00 MALP on-line profiling [Julien Adam & Antoine Capra, ParaTools]
  • Review [Judit Gimenez, BSC]
  • 12:30 (lunch)
    14:00 Hands-on coaching to apply tools to analyze participants' own code(s).
    17:00 (adjourn)
     

    Hardware and Software Platforms

    INTI heterogeneous Linux cluster system, including:

    • 36 'haswell' compute nodes each with four Intel Xeon E5-2698v3 'Haswell' processors (2.3GHz, 8 cores per processor, 2 hardware threads per core) and 128GB shared memory
    • 234 'sandy' compute nodes each with dual Intel Xeon E5-2680 'SandyBridge' processors (2.7GHz, 8 cores per processor, hardware threading disabled) and 64GB shared memory
    • 24 'knl' compute nodes each with a single Intel Xeon Phi 7250 'KnightsLanding' processor (1.4GHz, 68 cores per processor, 4 hardware threads per core) and 94GB+16GB MCDRAM shared memory
    • network: Infiniband interconnects
    • parallel filesystem: Lustre (SCRATCHDIR)
    • software: CentOS 7 GNU/Linux, Intel MPI & OpenMPI; Intel, GCC and other compilers; SLURM batch system (CCC commands/environment)

    The local HPC system INTI with Intel Xeon-based cluster partitions running Linux will be the primary platform for the workshop and will be used for the hands-on exercises. Course accounts will be provided during the workshop. Other systems where up-to-date versions of the tools are installed can also be used when preferred, though support may be limited and participants are expected to already possess user accounts. Regardless of whichever systems they intend to use, participants should be familiar with the relevant procedures for compiling and running their parallel applications (via batch queues where appropriate).

    Registration

    The workshop had 18 participants.

    Contact

    Tuning Workshop Series

    Brian Wylie
    Jülich Supercomputing Centre
    Forschungszentrum Jülich GmbH
    Phone: +49 2461 61-6589
    Email: b.wylie [at] fz-juelich.de
       

    Local Arrangements

    William Jalby, Emmanuel Oseret & Cédric Valensi
    Laboratoire d’informatique Parallélisme
    Université de Versailles St-Quentin-en-Yvelines
    Phone: +33 01 39 25 40 86
    Email: william.jalby [at] uvsq.fr

    Sponsors

    Intel