10th VI-HPS Tuning Workshop (LRZ, Germany)

Date

October 16-19, 2012

Location

Garching-bei-München
LRZ / TUM

Organizing Institutions

Goals

This hands-on workshop organized by VI-HPS for Gauss Centre for Supercomputing PRACE Advanced Training Centre will:

• give an overview of the VI-HPS programming tools suite
• explain the functionality of individual tools, and how to use them effectively
• offer hands-on experience and expert assistance using the tools

The workshop will be held in English and run from 09:00 to not later than 18:00 each day, with breaks for lunch and refreshments. There is no fee for participation, however, participants are responsible for their own travel, meals and accommodation.

Programme

Classroom capacity is limited, therefore priority will be given to applicants with parallel codes already running on the workshop computer systems, and those bringing codes from similar systems to work on. Participants are therefore encouraged to prepare their own MPI, OpenMP and hybrid MPI+OpenMP parallel application codes for analysis.

VI-HPS Tools

• KCachegrind is a free cache-utilization visualization tool developed by TUM.
• MAQAO free modular assembly code quality analyzer and optimizer framework developed by UVSQ.
• PAPI is a free library interfacing to hardware performance counters developed by UTK-ICL and used by many tools.
• Periscope is an automatic performance analysis tool using a distributed online search for performance bottlenecks being developed by TUM.
• Scalasca is an open-source toolset developed by JSC & GRS to analyze the performance behaviour of MPI & OpenMP parallel applications and automatically identify inefficiencies.
• TAU is a performance system for measurement and analysis of parallel programs written in Fortran, C, C++, Java & Python developed by the University of Oregon.
• Vampir is a commercial framework and graphical analysis tool developed by TUD-ZIH to display and analyze trace files.
• Score-P, OPARI2, OTF2 & CUBE4 are components of a community parallel performance instrumentation, measurement & analysis infrastructure.

Hardware and Software Platforms

The local HPC system is expected to be the primary platforms for the workshop, with priority for improved job turnaround and local system support. Course accounts will be provided for those who need them.

• IBM BladeCenter HX5 (SuperMIG): Xeon 10-core processors, SLES 11 Linux, IBM POE (and Intel MPI), Intel & GCC compilers
• IBM iDataPlex (SuperMUC): Xeon 8-core processors, SLES 11 Linux, IBM POE (and Intel MPI), Intel & GCC compilers

Other systems where up-to-date versions of the tools are installed can also be used when preferred, though support may be limited. Participants are expected to already possess user accounts on non-local systems they intend to use, and should be familiar with the procedures for compiling and running parallel applications on the systems.

Local arrangements & registration

Register via the LRZ registration form choosing course HHPS1W12:
http://www.lrz.de/services/compute/courses/#VIHPS

Although unclear from the Teilnahmebedingungen on the LRZ registration form, participants from PRACE partner countries are especially welcome.

The workshop will be held in Leibniz Rechenzentrum on the campus of Technische Universität München outside Garching bei München, approximately 25 min north from the city centre of Munich. The U-bahn line U6 (station: Garching-Forschungszentrum) provides direct connection from the campus area to both Munich and Garching.
Getting to/from LRZ

It is recommended to choose a hotel in Garching or Munich city centre and use the U-bahn to reach LRZ.
Accomodation in Garching
Accomodation in Munich

Contact

Brian Wylie (JSC), phone +49 2461 61-6589
Ventsislav Petkov (TUM), phone +49 89-289-17680