Virtual Institute – High Productivity Supercomputing

22nd VI-HPS Tuning Workshop (Uni. Cambridge, England) - PATC Performance Analysis Workshop

Date

Wednesday 6th - Friday 8th July, 2016.

Location

The workshop will take place at the University of Cambridge, Titan Teaching Room 1, Cockcroft Building Floor 2, New Museums Site, Cambridge, CB2 3QH, England.

Organizing Institutions

EPCC PRACE Cambridge

Goals

This workshop is organized by VI-HPS for the UK PRACE Advanced Training Centre in collaboration with the DiRAC Facility and HPC Service of the University of Cambridge to:

  • give an overview of the VI-HPS programming tools suite
  • explain the functionality of individual tools, and how to use them effectively
  • offer hands-on experience and expert assistance using the tools

On completion participants should be familiar with common performance analysis and diagnosis techniques and how they can be employed in practice (on a range of HPC systems). Those who prepared their own application test cases will have been coached in the tuning of their measurement and analysis, and provided optimization suggestions.

Programme Overview

Presentations and hands-on sessions are on the following topics:

  • TAU performance system
  • Score-P instrumentation and measurement
  • Scalasca automated trace analysis
  • MUST runtime error detection for MPI
  • ARCHER runtime error detection for OpenMP
  • MAP+PR profiling and performance reports

A brief overview of the capabilities of these and associated tools is provided in the VI-HPS Tools Guide.

The workshop will be held in English and run from 09:00 to not later than 18:00 each day, with breaks for lunch and refreshments. There is no fee for participation, however, participants are responsible for their own travel and accommodation.

Classroom capacity is limited, therefore priority will be given to applicants with MPI, OpenMP and hybrid OpenMP+MPI parallel codes already running on the workshop computer systems, and those bringing codes from similar systems to work on. Workstations are provided to connect to the workshop computer systems, however, (eduroam) wifi will be available so participants could also use personal notebook computers with SSH and X11 configured.

Outline

The workshop introduces the open-source community-developed Score-P instrumentation and measurement infrastructure, and the Scalasca and TAU tools using it, to provide a practical basis for portable performance analysis of parallel applications. It will be delivered as a series of presentations with associated hands-on practical exercises using the DiRAC Darwin cluster and/or ARCHER Cray XC30. Starting with basic application instrumentation and measurement to generate execution profiles, then improving measurement quality via customization capabilities, progresses to interactive and automated analyses of execution traces.

While analysis of provided example codes will be used to guide the class through the relevant steps and familiarise with usage of the tools, coaching will also be available to assist participants to analyse their own parallel application codes and may suggest opportunities for improving their execution performance and scalability.

Programme

Day 1: Wednesday 6th July
09:00 Welcome messages [Filippo Spiga & Michael Bareford]
09:15 Introduction
  • Introduction to VI-HPS & overview of tools [Brian Wylie, JSC]
  • Introduction to parallel performance engineering
  • Lab setup
  • Computer systems and software environment (Archer)
  • Building and running NPB-MZ-MPI/BT-MZ on Darwin (Archer)
  • 10:30 (break)
    11:00 TAU performance system [Sameer Shende, UOregon]
  • TAU hands-on exercises
  • 12:30
    (lunch)
    14:00 Hands-on coaching to apply tools to analyze participants' own code(s).
    17:00 Review of day and schedule for remainder of workshop
    17:30 (adjourn)

    Day 2: Thursday 7th July
    09:00 Instrumentation & measurement with Score-P [Wylie, JSC]
  • Score-P hands-on exercises
    Execution profile analysis report exploration with CUBE [Hermanns, JSC]
  • CUBE hands-on exercises
  • 10:30 (break)
    11:00 Configuring & customising Score-P measurements [Wylie, JSC]
  • Score-P hands-on exercises
    Automated trace analysis with Scalasca [Hermanns, JSC]
  • Scalasca hands-on exercises
  • 12:30
    (lunch)
    14:00 Hands-on coaching to apply tools to analyze participants' own code(s).
    17:00 Review of day and schedule for remainder of workshop
    17:30 (adjourn)

    Day 3: Friday 8th July
    09:00 MUST MPI runtime error detection [Joachim Protze, RWTH]
  • MUST hands-on exercises
  • ARCHER OpenMP runtime error detection [Joachim Protze, RWTH]
  • ARCHER hands-on exercises
  • 10:30 (break)
    11:00 Allinea tools suite [Florent Lebeau, Allinea]
  • Allinea hands-on exercises
  • 12:30
    (lunch)
    14:00 Review of workshop
    14:30 Hands-on coaching to apply tools to analyze participants' own code(s).
    16:00 (adjourn)

    Hardware and Software Platforms

    Darwin: Dell C6220 cluster with 600 compute nodes consisting of two 8-core Intel E5-2670 (SandyBridge) processors sharing 64GB of NUMA memory, Mellanox FDR interconnect, Intel MPI & compilers. Training accounts will be provided!

    ARCHER: Cray XC30 with 3008 compute nodes consisting of two 12-core Intel E5-2697 (IvyBridge) processors sharing 64GB (or 128GB) of NUMA memory, Aries dragonfly interconnect, Cray MPI, Cray, GCC & Intel compilers, PBS Pro job management system. Training accounts will be provided!

    Other systems where up-to-date versions of the tools are installed can also be used when preferred, though support may be limited. Participants are expected to already possess user accounts on non-local systems they intend to use, and should be familiar with the procedures for compiling and running parallel applications.

    Registration

    Registration is via the PRACE training portal. Note: the number of participants is limited, and preference will be given to those bringing parallel application(s) to analyse and tune as part of the workshop.

    Contact

    Local Arrangements

    Filippo Spiga
    HPC Services, University of Cambridge
    E-mail: fs395[at]cam.ac.uk
        Michael Bareford
    EPCC, University of Edinburgh
    Email: michael.bareford[at]epcc.ed.ac.uk

    Tuning Workshop Series

         Brian Wylie
         Jülich Supercomputing Centre
         Email: b.wylie[at]fz-juelich.de